TABLE OF CONTENTS There are times when the internal RAM and EEPROM memory in a PIC just isn't enough. You might wish to save sensor readings for later analysis, or perhaps your program displays long text strings that can't be squeezed into the available memory. In this chapter, we'll look at two types of external memory slow serial EEPROM devices and fast parallel static RAM (SRAM) chips.
Serial memory chip are available in several interface protocols. Since we've already studied 1-wire and SPI (3-wire) serial protocols in other contexts, to learn something new we'll limit our examination of external memory chips to those employing the "Inter IC" bus, or I 2C, originally developed by Philips Semiconductors, but widely adopted by other manufactures. Although we'll study it in the context of external memory, many other chips, such as LCD controllers, analog-to-digital converters and frequency synthesizers are I 2C bus controlled.
The I 2C shares elements of both the 1-wire and SPI protocols, but, as might be expected, adds its own flavors. Since MBasic's I2cout and I2cin functions encapsulate the details of I 2C communications, we'll satisfy ourselves with an overview of the protocol. I 2C is a two-wire interface, with separate clock and data lines. Originally the data speed was set at a maximum of 100 Kbits/s, now called the "standard" mode, but newer devices are rated at 400 Kbit/s, or "fast" mode or up to 3.4 Mbit/s, the "high-speed" mode. I2cout and
