Designing High-Speed Interconnect Circuits: Advanced Signal Integrity Methods for Engineers

Chapter 8: Board Layout

We standardize board design rules or procedures or practices to increase the likelihood of success in a design. It is common practice to analyze various situations and identify solutions that are relatively safe that is, have a high probability of succeeding. Then we codify those solutions, calling them design rules. This chapter presents a list of board layout rules. Such sets of rules are seldom absolutely optimal for any particular design but, if followed, yield a high probability of success. Perhaps it would be better to think in terms of guidelines, since these are not instructions to be blindly followed against all contravening evidence. Rather, they are recommendations that are deemed reliable in cases where full analysis is for some reason impractical. You should keep yourself informed and should always be willing to break such rules; you also should always be prepared to justify having broken such rules. These guidelines are presented to help fill in gaps that occur when you don't have enough resources, or not enough time to do a full analysis of each and every situation.

Fundamentals

In the design of buses, the layout must meet certain objectives. It is not enough to simply connect point a to point b to point c. The design must guarantee that the time required for the signal to become valid at particular endpoints satisfies timing requirements. Voltage requirements, maxima and minima, must be satisfied. Rise and fall times must meet specifications, and so on. In designing high-speed differential...

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