2.2.1 Integer-N divider PLL

The previous section has been devoted to PLL principles. However, so far, the system does not appear to be useful at all for the synthesis of a desired frequency. After all, the output signal is just the replica of an already available reference signal at ? _ref, which could then be directly used in place of ? _out. The system becomes interesting once a frequency divider is placed in the feedback path (Figure 2.8). Now, the divider output runs at the PLL output frequency divided by N, i.e., ? _div= ? _out /N. When the PLL is locked, ? _div= ? _ref, so the output is the reference frequency multiplied by N:

Figure 2.8: PLL with integer-N frequency divider

The loop is therefore able to synthesize an output frequency, which is a multiple of a highly accurate reference at a lower frequency. Moreover, by changing the integer value of N, the output frequency can be changed with a minimum frequency step equal to ? _ref. The arrangement is called integer-N PLL. In wireless applications, the output signal is in the GHz range while the reference may be derived from a stable quartz oscillator, usually at several MHz. The magnitude of N is of the order of 10 ² 10 ³ or even larger.

Figure 2.9 shows the basic structure of the frequency divider whose design issues...