Integrated Frequency Synthesizers for Wireless Systems

The reference frequency has not been considered so far. Of course, it has an impact on the value of the division factor. Once the desired ? is calculated, the product K VCO I P must scale proportionally to N, see (2.8). However, except for this practical issue, the reference frequency seems to be out of the game. Moreover, the above procedure may suggest that the settling time can be reduced simply by increasing the frequencies of both the zero and the third pole, taking the factor b as a constant.
These conclusions are erroneous, since they do not take into account the discrete-time nature of the PLL. As the zero frequency rises, the PLL bandwidth gets wider, moving closer to the Gardner limit ? ref/10, and the continuous-time approach breaks down. The Gardner condition ? (?3dB)< ? ref/10 sets, in practice, a bound to the loop bandwidth and to the settling time.
For example, Table 2.1 and Table 2.2 show that the optimum loop with b=8 is characterized by ? Z=4.7/ ? (?3dB)= t s/4.5. Since ? ref=2 ?/ T ref, the Gardner condition ? (?3dB)< ? ref/10 gives t s>34 T ref. Sometimes a safer condition ? (?3dB) < ? ref/20 is adopted, thus doubling up the number of reference cycles required for settling.
As the closed-loop bandwidth of...