Overview

Silicon-on-insulator (SOI) refers to the first engineered semiconductor substrate where a buried layer of silicon dioxide is created beneath a thin layer of silicon. After a long development history for around 30 years, SOI technology has now joined the microelectronics roadmap and has started to be used as the mainstream technology in CMOS LSIs. The advantages of SOI devices over conventional silicon devices are manifold and have been summarised in many references [1, 2]. Circuits based on SOI technology are extremely attractive for two basic reasons: (1) enhanced performance (higher speed, lower power dissipation) and (2) extended scalability.

SOI devices intrinsically have very low junction capacitance, where the buried oxide (BOX) can yield a three-fold reduction. The phenomenon of CMOS latchup is eliminated in SOI, as there exists no path for current flow to the substrate. SOI devices eliminate the body-effect since their body potential is not tied to ground. SOI devices have a body factor close to unity and hence this reduces their subthreshold slope, an attractive feature for switching applications. SOI technology is compatible with conventional silicon technology. In principle, by suitable process modifications, a circuit can be realised using fewer process steps. Scaling in SOI is easy, as the BOX thickness need not be scaled, so only the dimensions of the device need to be scaled. However, SOI devices suffer also from some drawbacks:

1. Floating body effect in partially depleted SOI MOSFETs are prone to 'kink' effect in d.c. circuits and drain-current overshoot in switching circuits.