Design and Development of Medical Electronic Instrumentation

Chapter 4 - Electromagnetic Compatibility And Medical Devices: Pulse Reflection and Termination Techniques

Pulse Reflection and Termination Techniques

In a typical circuit, a driving logic element and a receiving logic element are connected by
a PCB track. In the equivalent circuit shown in Figure 4.36, a pulse with amplitude Vd is
injected by the driver logic element, which presents an output impedance Zd into a PCB
track of length lt and impedance Zt. The pulse carried by the PCB track is then presented
to the input impedance Zr of the receiving element. If we suppose that a Zt = 100 Ω track
carries the pulse, and after looking at the data sheets for a selected 5-V family of high-
speed logic, we find that the output and input impedances at our frequency of interest are
Zd = 50 Ω and Zr = 10 kΩ, respectively, then upon reaching the receiver, a reflected pulse
starts traveling back toward the driver with amplitude that can be approximated by

 

which assumes a negligible attenuation of the pulse throughout its conduction, and which
takes into consideration only the real parts of the variables. This reflected pulse will be
rereflected back toward the receiver upon hitting the driver with an amplitude approximated
by

 

This negative signal will interact with the original incident pulse with a delay equivalent
to the time it takes for the pulse to travel back and forth along the track τ(ns) = 0.31tr.

Depending on the length of the PCB track, the -1.63-V reflection could distort the
leading edge of the pulse so much that it will cause the false detection of a logic-low
(Figure 4.37). A different combination of impedances could have caused the reflected pulse


Figure 4.36 The output of a logic element connected through a PCB track to the input of another logic element can be modeled as an ideal voltage step generator that drives a transmission line of impedance Zt through an output impedance Zd. The transmission line is then terminated by the receiver’s input impedance Zr.


Figure 4.37 A critical length of PCB track could cause the rereflected pulse to distort the leading edge of the pulse so much that it will cause, in this case, the false detection of a logic-low.


to be positive, possibly causing the false detection of a logic-high, or the false activation
of an edge-sensitive device. Moreover, a reflected pulse presented to the receiver will cause
yet another reflected pulse, which although with far less amplitude, may still be able to
cause erroneous operation of a circuit.

Obviously, the solution to the reflected-pulse problem is to match the impedances in
the best possible way. This design procedure, called transmission line termination, can
be accomplished in four different ways: series, parallel, Thévenin, and ac, as shown in
Figure 4.38. Series termination is recommended whenever Zd < Zt and the line is driving
a reduced number of receivers. This technique, which gives good results in most high-
speed TTL circuits, consumes negligible power and requires the addition of only one
resistor, the value of which is given by

 

The major drawback of the series termination technique as far as logic signal integrity goes
is that it increases signal rise and fall times. However, the same is a blessing as far as
reducing electromagnetic emissions.

In contrast to series termination, which eliminates pulse reflection at the driver end, all
other techniques eliminate reflection at the receiver end of the PCB track. Parallel termination
Rterm = Zt as well as Thévenin termination Rterm = 2Zt techniques consume large
amounts of power; however, they provide very clean signals. Ac termination Rterm = Zt,
which uses a small capacitor to couple only ac components to ground, is not as power hungry
as the preceding methods but adds capacitive load to the driver and increases the time
delay due to its inherent RC constant.

 

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