Computer Telephony Encyclopedia

PCI chassis / mezzanine bus version of the CT Bus interoperability specification that is part of the Enterprise Computer Telephony Forum (ECTF) client/server architecture for scalable computer telephony systems. H.100 is a high capacity bus with provisions for redundancy and compatibility modes to enable interoperability with devices developed to existing telephony resource buses like SCbus and MVIP.
Computer telephony applications must access network interface and media processing resource boards plugged into a computer. CT boards must access telephony signals and sometimes must work in concert with their fellow boards. Voice, video and real-time fax have low-latency requirements and are event-driven with isochronous data streams, but PCs use asynchronous buses and interrupts lacking any guaranteed real-time processing. Normally the host CPU would handle this kind of processing, but with the proliferation of boards in high density CT systems, it became evident that the CPU and system bus would be overburdened and much of this time-critical processing of isochronous telephony traffic should be offloaded somehow.
It became evident that what was needed was some kind of internal telephony bus or CT bus, a mezzanine bus separate from the conventional local I/O board bus, to connect the distributed-switching interface circuits on each resource board. In this way CT boards could transmit separate digitized signals (data, voice, video, fax) simultaneously over a communication medium (a backplane or a ribbon cable) by quickly interleaving a piece of each signal from each board in succession (Time Division Multiplex timeslots) and putting...