System-on -Chip: Next Generation Electronics

Part III: Power Reduction and Management

Chapter List

Chapter 10: Power-efficient Data Management for Dynamic Applications
Chapter 11: Low Power System Scheduling, Synthesis and Displays
Chapter 12: Power Minimisation Techniques at the RT-level and Below
Chapter 13: Leakage Power Analysis and Reduction for Nano-scale Circuits
P. Marchal J.I. Gomez D. Atienza S. Mamagkakis F. Catthoor

10.1 The design challenges of media-rich services

Business analysts forecast a 250 billion dollar market for media-rich, mobile wireless terminals [1]. These systems require an enormous computational performance (40 GOPS [1]). Even though current PCs offer this performance requirement, they consume too much power (10 100 W). Mobile devices should consume at least two or three orders of magnitude less power [2]. Furthermore, they should be cheap to successfully penetrate the consumer market. Consequently and in spite of the design issues, the engineering and manufacturing costs need to be reduced. Industry strongly believes that platforms are a potential way to meet the above challenges.

10.1.1 The era of platform-based design

A platform is a fixed micro-architecture together with a programming environment that minimises mask-making costs and is flexible enough to work for a set of applications [3]. The production volumes can then remain high over an extended chip lifetime.

Given the strong energy constraints, we must choose the flavour of these platforms. Since power is cubic to the processing frequency, parallelism is an effective way to reduce power and energy consumption. Then, multiple simple processors are preferred to one complex speculative and out-of-order processor. In the right application...

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