A INTRODUCTION

Porous silicon is not a new material for microelectronics applications. It was first being turned to practical use for device isolation in 1969 by the Nippon Telegraph and Telephone Public Corporation (NTT) [1] and the Sony Corporation [2]. Extremely high chemical reactivity of porous silicon (PS), particularly its rapid oxidation, was exploited. This has made possible thick films of oxidised PS with associated dielectric properties equivalent to those of conventional thermal silica. Isolation techniques based on oxidised PS are grouped together as EPOS (isolation by porous oxidised silicon). A variety of IPOS modification (n-type IPOS, p-type IPOS, etc.) was developed as a possible alternative to isolation by p-n junction and isoplanar methods.

In the mid-1970s many novel routes for full dielectric isolation based on PS were developed. These constitute a class of SOI (silicon-on-insulator) technology in their own right. Two different types of approach have been used to form SOI structures based on PS. They are selective lateral anodisation underneath silicon islands to form isolated areas as well as epitaxial growth of silicon on the surface of PS. Enhanced oxidation of PS in comparison with bulk silicon has been utilised to oxidise porous layers within a sandwich structure.

Porous silicon is a very versatile material. Its microelectronic applications are not confined to isolation. Of obvious interest is PS used as a buffer subsurface layer in heteroepitaxial compound semiconductor as well as diamond film deposition. Moreover,...