TABLE OF CONTENTS Using the previous ideas, combinational logic circuits can be combined using either the first canonical form (sum of products) or the second canonical form (product of sums). However, in this text only the first canonical form only will be considered, taking into account logic level 0 or 1 and propagation (time) delays in the cells.
Within a logic gate is an analogue circuit consisting of transistors either bipolar, using NPN and PNP bipolar junction transistors, or CMOS (complementary metal oxide semiconductor), using n-channel MOS and p-channel MOS transistors. Logic gates in CMOS are of three different circuit architectures at the transistor level [11]: static CMOS, dynamic CMOS, and pass transistor logic CMOS. Today, static CMOS logic is by far the dominant type used. It is built on a network of pMOS and nMOS transistors connected between the power supplies, as shown in Figure 5.13.
The input signals are connected to the gates of the transistors, and the output is taken from the common connection between the transistor networks. The transistors will act as switches, with the switch connections between the drain and source of the transistor. Switch control is via a gate voltage:
An nMOS transistor will be switched ON when high voltage (logic 1) is applied to the transistor gate. Low voltage (logic 0) will turn the switch OFF.
A pMOS
