Digital Systems Design with FPGAs and CPLDs

| 5.1 | Convert the following decimal numbers to unsigned binary:
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| 5.2 | Convert the following decimal numbers to 2s complement signed binary:
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| 5.3 | Convert the following unsigned binary numbers to decimal:
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| 5.4 | Convert the following unsigned binary numbers to octal:
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| 5.5 | Convert the following unsigned binary numbers to hexadecimal:
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| 5.6 | Consider the Boolean logic expression: Draw the logic level schematic for this design:
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| 5.7 | Consider the Boolean logic expression: Draw the logic level schematic for this design:
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| 5.8 | Consider the Boolean expression: Draw the logic level schematic for this design:
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| 5.9 | Design a circuit using combinational logic that will convert a four-bit unsigned binary into Gray code. |
| 5.10 | Create the truth table for a five-bit Gray code count. |
| 5.11 | Design a circuit using combinational logic that will implement parity checking on a four-bit input. The circuit is to use even parity coding. |
| 5.12 | Design a circuit using combinational logic that will implement parity checking on a four-bit input. The... |