Designing High-Performance Networking Applications: Essential Insights for Developers of IXP2XXX Network Processor-based Systems

Queue Manager

The queue manager is a driver microblock that implements the physical queues in the system and provides an interface for enqueue and dequeue operations to the rest of the application. Typically, the queue manager uses the Q-Array hardware in the SRAM controller, which provides acceleration for link-lists and rings in SRAM. However, in some applications, the queue manager may choose to implement the queues completely in software for reasons described later.

Managing the Q-Array Hardware

As described in Chapter 4, the Q-Array has 64 entries, each of which can support a ring or a link-list. Obviously 64 entries is insufficient for most applications. Therefore, the queue manager manages a 16-entry cache of queues in the Q-Array with backing store in SRAM. The application can define any number of queues in SRAM limited only by SRAM capacity. Each queue requires a queue descriptor of 16 bytes in a format understood by the Q-Array. The queue descriptor contains fields such as the head, tail, and the count of the number of elements in the queue.

Every time the queue manager receives an enqueue or a dequeue request, it checks the cache to see whether the queue descriptor is already in the 16 entries cached in the Q-Array. If it is present in the cache, the queue operation proceeds. If it is not present in the cache, then the queue manager evicts the LRU entry from the cache and reads in the queue descriptor from SRAM. It then proceeds with the...

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