Transaction Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems

Abbreviation

API

Application Programming Interface

ASIP

Application Specific Processor

ATPG

Automatic Test Pattern Generation

BCA

Bus Cycle Accurate

CMOS

Complementary Metal Oxide Semiconductor

CODEC

Coder/Decoder

CPU

Central Processing Unit

DCT

Discrete Cosine Transformation

DMA

Direct Memory Access

DOM

Document Object Model

DSP

Digital signal processing

DUT

Design Under Test

EDA

Electronic Design Automation

eDRAM

Embedded Dynamic Random Access Memory

FIFO

First-In-First-Out

FPGA

Field Programmable Gate Array

FSM

Finite State Machine

GALS

Globally Asynchronous Locally Synchronous

GDB

GNU DeBugger

GDS

Graphical Data System

HDL

Hardware Description Language

ICE

In Circuit Emulator

IP

Intellectual Property

IPTG

Intellectual Property Traffic Generator

ISS

Instruction Set Simulator

JTAG

Joint Test Action Group

LCD

Liquid Crystal Display

LGI

Loose Generator Interface

LMI

Local Memory Interface

MDA

Model Driven Architecture

MMU

Memory Management Unit

NoC

Network on Chip

NUMA

Non-Uniform Memory Architecture

OS

Operating System

OSCI

Open SystemC Initiative

PC

Program Counter

PCI

Peripheral Component Interconnect

POSIX

Portable Operating System for unIX

RDB

Relational Data Base

RISC

Reduced Instruction Set Computer

ROM

Read Only Memory

UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Category: Digital Signal Processors (DSP)
Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.