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Supplier: Microchip Technology, Inc.
Description: (UTP) cable, with industry leading tolerance to NEXT, FEXT, Echo, and system noise. Additional Features Very low power consumption: less than 700 mW Single 3.3 V power supply with on-chip regulator Supports PICMG 2.16 and 3.0 Ethernet backplanes at approximately 500 mW High-performance 1.25
- Data Rate: 10,000 to 1,000,000 kbps
- Features: Other
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Supplier: Broadcom Inc.
Description: The Vortex Gearbox™ AVSP-1104 is a single-chip 100Gbps gearbox PHY IC designed for high-density 100G Ethernet and Optical Transport Networking (OTN) applications. The device supports full-duplex multiplexing of ten 10/11Gbps channels and de-multiplexing of four 25/28Gbps channels. The device
- Network Equipment: Multiplexer
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Supplier: Integrated Device Technology
Description: fairness, and provide superior multicast throughput. The CPS -1848's 6.25 Gbaud SerDes is ideal for backplanes, yet can run even lower power for local connectivity.This performance is realized over twice the transmission channel distance and three orders of magnitude improvement in bit
- Operating Ambient Temperature: 0 to 70 C
- Pin Count: 784
- Features: Other
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Supplier: Intel Corporation
Description: The Intel® 82598 10 gigabit Ethernet controller is a PCI Express* 2.0 (2.5 Gbps) controller with balanced features and energy-efficient design that meets the throughput and latency requirement of bandwidth-hungry applications. The Intel 82598 10 gigabit Ethernet controller is a single,
- Number of Ports: 2
- Operating Temperature: 0 to 55 C
- Protocol / Network: Gigabit Ethernet
- Features: Other
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Supplier: Win Source Electronics
Description: Win Source Part Number: 1047760-B4860NXE7QUMD Category: Integrated Circuits (ICs)>Embedded - Microprocessors Series: QorIQ Qonverge B Core Processor: PowerPC e6500 Number of Cores/Bus Width: 4 Core, 64-Bit Speed: 1.8GHz Co-Processors/DSP: Signal Processing; SC3900FP FVP - 6 Core RAM Controllers:
- Operating Temperature: -40 to 105 C
- Data Bus: 64-Bit
- Package Type: Other
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ADI's ADN4620 is a dual-channel, signal isolated, low voltage differential signaling (LVDS) buffer that operates at up to 2.5 Gbps with very low jitter. The devices integrate ADI iCoupler technology enhanced for high-speed operation to provide drop-in galvanic isolation of LVDS (read more)
Browse Isolation Transformers Datasheets for DigiKey -
LVDS/LVPECL Differential output Phase Jitter (12KHz~20MHz): 15fs @ 625MHz Applications: Next-generation Ethernet (1.6T, 3.2T) SerDes high-speed data transmission (800 Gbps) high-speed digital (read more)
Browse Oscillators Datasheets for Interquip Electronics Co., Ltd. -
specify Start-up Time: 10ms Max. Phase Jitter (12KHz~20MHz): 15fs @ 625MHz Applications: Next-generation Ethernet (1.6T, 3.2T), SerDes, high-speed data transmission (800 Gbps), high-speed digital signal processing (DSP), high-precision measurement instruments, data center servers, high-performance computing (HPC), etc. (read more)
Browse Crystals Datasheets for Interquip Electronics Co., Ltd. -
consumes just 0.03% of a 10G SerDes signal unit interval, preserving over 99% of the signal margin after traversing lossy PCB traces and undergoing conversion. Advanced manufacturing technologies enable these achievements. MEMS photolithography processes have broken through the precision limits (read more)
Browse Oscillators Datasheets for Interquip Electronics Co., Ltd.
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Multiband architecture for high-speed SerDes
In this paper, we explore a multiband architecture for a 25 Gbps SerDes , where the channel in each sub-band is approximately frequency flat, eliminating need of an equalizer in the receiver.
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Scientist Highlights Steps To Developing 100 Gigabit Ethernet Standard
A fundamentally new way of designing backplanes and having a 25 Gbps SERDES [serializer/deserializer] developed within the OIF will be the 100 Gig enablers the industry requires to move the technology forward." .
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The Migration of the Optical Internetworking Forum Common Electrical Interface Standardization to Optical Intra‐System Interconnects Beyond 25 Gb/s
[15] C. Y. Liu and J. Caroselli, “Comparison of Signaling and Equalization Schemes in High Speed SerDes (10- 25Gbps ),” Proc. IEC DesignCon (Santa Clara, CA, 2007).
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Beyond 10 Gbps? Challenges of Characterizing Future I/O Interfaces with Automated Test Equipment
[19] Cathy Liu and Joe Caroselli, "Comparison of Signaling and Equalization Schemes in High Speed SerDes (10- 25Gbps )," Proceedings of the IEC DesignCon, 2007.
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Semtech Completes Acquisition of Gennum Corporation
Combining Gennum's 1 Gbps to 25 Gbps signal integrity solutions with Semtech's 40 Gbps to 100 Gbps SerDes solutions creates one of the industry's most complete and robust analog and mixed signal portfolios targeted at the communications and enterprise computing segments," …
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Semtech Announces Plans to Acquire Gennum Corporation
We believe Gennum’s unique signal integrity solutions and highly differentiated 1 Gbps to 25 Gbps optical products combined with Semtech’s leading 40 Gbps and 100 Gbps SerDes portfolio will deliver one of the industry’s most complete and robust portfolios to the communications …
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Broadcom Backplane Fits in Foundry | Light Reading
The integration of multiple 3.125 Gigabits per second ( Gbps ) serializer/deserializer ( SerDes ) channels with 7 million bits of custom SRAM (static random access memory … … chip eliminates over 1,500 pins and reduces power by more than 25 % versus comparable discrete …
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A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13μm CMOS technology
The maximum throughput of this 4 4 load-balanced switch circuit with quad SerDes interface is about 28 Gbps . … Birkhoff-von Neumann switches, part I: one-stage buffering,” Computer Communications, Vol. 25 , pp. 611-622 …
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Enabling terabit per second switch linecard design through chip/package/PCB co-design
The main goal of the simulation is to validate the possibility of enabling 25 Gbps data rate for the entire chip/package/PCB channel designed. The simulation results are also used to study the potential implementation requirements of future SerDes technologies.
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A low-cost wire-bonding package design with package built-in three-dimensional distributed matching circuit for over 5Gbps SerDes applications
The three-dimensional distributed matching circuit has been applied to the two-metal layer wire-bonding package for 6.4 Gbps SerDes device. … to that of the standard 50 Ohm design (100 Ohm in differential mode, 25 Ohm in common …