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  • A high-frame-rate embedded image-processing system by using a one-chip DSP
    Because of the architectural parallelism, the system can perform three operations concurrently: (1) a capture operation which includes the transmission of the image data through the LVDS parallel port from the CMOS image sensor to the PPI, and the data-transfer with …
  • New Developments and Applications in Sensing Technology
    LVDS receivers and transmitters convert the LVDS signals to the single-ended CMOS signals required by the image sensor , ADC and high current pin drivers.
  • http://dspace.mit.edu/bitstream/handle/1721.1/72626/805986530-MIT.pdf?sequence=2
    To allow for reliable transmission from the CMOS sensor to the Microcontroller, we used a Low Voltage Differential Signaling ( LVDS ) module on the CMOS chip and a Random Lock De-serializer added to the Microcontroller board to Serialize the 8 data lines …
  • The TOTEM Experiment at the CERN Large Hadron Collider
    The motherboard (figure 4.14) hosts clock and trigger distribution circuitry, Gigabit Optical Hybrids (GOH) — three for data and two for trigger bit transfer, two Coincidence Chip mezzanines, LVDS - to - CMOS converters, Trigger VFAT mezzanine … … Monitor circuitry and temperature sensors .
  • Experimental color video capturing equipment with three 33-megapixel CMOS image sensors
    For this system, a large format high-speed 33 megapixel CMOS image sensor featuring a 2D mesh grid to distribute the power supply to the pixel, a column parallel successive approximation A/D architecture, and the LVDS readout to achieve a high data …
  • Copyright page
    … computing effect; third generation technology based SOC debugging; W-band high bit passive phase shifter; compact UWB fuze sensor system; CMOS VCO; BICMOS VCO; doherty … … Serdes; KA band waveguide- to -microstrip transition; CMOS CDC comparator design optimization; LVDS driver design; helical inductor …
  • FITPix data preprocessing pipeline for the Timepix single particle pixel detector
    Timepix detector consisting of the sensor chip bump-bonded to the readout chip, which is wire bonded to the chipboard. . the serial readout through LVDS lines and the second is the parallel readout through a 32-bit wide CMOS bus.
  • Serial WireRing - High-Speed Interchip Interface
    … Level CAN Controller Area Network CDR Clock and Data Recovery CMOS Complementary Metal Oxide Semiconductor … … LIN Local Interconnect Network LVDS Low-Voltage Differential Signaling … … Transport NRZ Non-Return- to -Zero PCB Printed Circuit … … Locked-Loop PSI Peripheral Sensor Interface RAM Random Access …
  • Scientific Detectors for Astronomy
    … of the key features of the NGST ASIC include: – 32 input channels – 4 additional channels for reference output, window output, temperature sensors – Up to 500 kHz A/D conversion … … channels for data transfer ( LVDS or CMOS ) – <100 mW at …
  • Integrated Imaging and Vision Techniques for Industrial Inspection
    Therefore, in the last years, there were several attempts to exploit the TDI effect using CMOS image sensors . The advantage of the CMOS fabrication process is that additional electric circuits such as column-parallel analog to digital con- verters (ADCs) or low-voltage differential signaling ( LVDS ) outputs [30] can be easily implemented on chip, which is essential for reaching high …