TABLE OF CONTENTS In this chapter we present the main sources of power consumption in digital VLSI circuits based on static CMOS technology. In particular, we briefly analyze the main parameters affecting the total power consumption, namely the clock frequency, the supply voltage, the capacitive load, and the switching activity. Then, we present an overview of the state-of-the-art power estimation techniques that can be used during the design flow of a VLSI-based system.
Providing an overview of the sources of power consumption in digital circuits, our focus is on CMOS technology [ [62], [63]].
Although the design of portable devices certainly requires consideration of the peak power consumption for reliability and proper circuit operation, we concentrate on the time averaged dynamic power since it is directly proportional to the battery weight and volume required to operate circuits for a given amount of time.
The average power dissipation of a digital CMOS circuit can be decomposed in a static and a dynamic component:
The static power P static characterizes circuits that have a constant source of current between the power supplies (such as bias circuitry, pseudo-NMOS logic families etc.). Besides, it can become significant in CMOS circuits in the presence of "stuck-at on" transistor faults. However, for properly designed CMOS...
