Complete PCB Design Using OrCad Capture and Layout

Appendix A: Layout Technology Files

Usage

Technology files (*.TCH)

Design complexity level/class

Units

Trace width

Route spacing

System settings Grid settings (mills)

Default via size

Layers provided

Default board outline

Place

Routing

Via

Route

Plane

Drill

Route

Plane

Typical

_default

A

Mils

12

12

100

25

25

50

75

28

12

2

None

default

A

Mils

12

12

100

25

25

50

75

28

12

2

None

1bet_any

A

Mils

12

12

100

25

25

50

75

28

12

2

None

2bet_smt

B

Mils

8

8

100

8 1/3

8 1/3

40

70

20

12

2

None

2bet_thr

B

Mils

10

8

100

20

20

40

70

20

12

2

None

3bet_any

C

Mils

6

6

100

12 1/2

12 1/2

36

70

20

12

2

None

metric

B

Metric

0.254

0.254

1.27

0.254

0.254

0.762

1.524

0.381

12

2

None

Chip package

ceramic

B

Metric

0.25/0.28

0.254

1.27

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