TABLE OF CONTENTS The design of linear active circuits typically involves multiple tradeoffs among supply voltage, accuracy, power, speed, and other factors. However, an all-round design that meets all the expectations is impracticable as we are living in a wonderful and yet imperfect world. Depending on the application's requirements and the technology available, circuit designers may choose to optimize either one of these fundamental design aspects.
This chapter investigates two major challenges that are of immediate relevance to modern switched-capacitor (SC) circuits. One is to design high-performance SC circuits in the presence of a low power supply voltage ( V dd < 1.5 V), and the other is to reduce the effect of the imperfections (or nonidealities) of operational amplifiers (op-amps) on SC circuits.
Section 7.2 presents a number of low-voltage SC circuit techniques such as clock boosting, bootstrapped switch, and switched op-amp. Then Section 7.3 explores two accuracy-enhancement techniques suitable to desensitize SC circuits from op-amp imperfections, namely autozeroing and correlated double sampling.
Since the late 1990s, the brisk market for small-form-factor portable electronic products including cellular phones, MP3 players, hearing aids, and handheld medical testing devices has driven the fast advancement of modern fine-line-width submicron CMOS technologies. As CMOS device dimensions continue to shrink for achieving higher integration densities, it is almost essential that the allowable power supply voltage ( V dd) be scaled down proportionally to guarantee the device's long-term reliability.
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