4.1 Introduction

In the 1970s, a surging demand for high-quality monolithic MOSFET active filters in the fields of voice/data communications and instrumentations stimulated tremendous research-and-development (R&D) efforts of switched-capacitor filters (SCF) [1][2][3]. Figure 4.1 shows a generic block diagram of an SCF-based sampled-data filtering system.

Figure 4.1: Block diagram of a sampled-data SC filtering system.

As shown in the diagram, the analog input signal is preprocessed by an antialiasing filter (AAF) to eliminate the unwanted signals located beyond half the clock sampling frequency. The input sample-and-hold (S&H) stage samples the analog input signal and sends a sampled-data signal to the subsequent SCF. Depending on the application, an SC decimator may be incorporated into the input S&H stage so that the signal frequency can be reduced from Mf to f ( M > 1). The output from the SCF is sent to a second S&H stage, which is typically built from a sampled-data-to-continuous-time voltage buffer (see Chapter 5). In some cases, an interpolator is employed in this stage to upsample the signal from f to Nf( N > 1). The last stage is a reconstruction filter that is typically used for smoothing the output waveform.