TABLE OF CONTENTS In this chapter, some circuit solutions for the implementation of CCIIs in CMOS technology are proposed. The ideal features of a second generation current conveyor will be introduced in detail and some CCII equivalent models will be investigated.
Then, a wide number of topologies for CCII will be described and analysed, so considering the differences between simulated and theoretical results.
In the first chapter the basic characteristics of a second generation current conveyor have been introduced. Its block representation is reported again in figure 2.1 [1], [2].
In a matrix representation, the behaviour of CCII signals, voltages and currents, has been proposed too, so summarising the overall response of the block (figure 2.2).
The impedance level of the terminals has been also considered. Those reported in figure 2.3 are the ideal ones. The CCII ideal equivalent model is shown in figure 2.4.
The circuit implementation of CCIIs leads unavoidably to design devices whose characteristics are close, but not equal, to the ideal ones, described in the previous paragraph.
In this section these differences will be considered in detail and a practical model for the second generation current conveyor will be introduced. Figure 2.5 shows a first model of a real, or non-ideal, CCII. a and
