Area Array Packaging Handbook: Manufacturing and Assembly

Chapter 17: NEXT-GENERATION FLIP CHIP MATERIALS AND PROCESSING

Daniel F. Baldwin, Ph.D.

17.0 INTRODUCTION

One of the significant developments to improve cost, reliability, and productivity in the electronic packaging industry has been flip chip (FC) technology. This technology has been enhanced further to enable direct assembly to printed wiring boards (PWBs) in high-volume surface-mount assembly called FC-on-board technology. The FC process was first introduced for ceramic substrates as the solid logic technology by IBM in 1962. In 1970, IBM introduced the controlled collapse chip connection (C4 technology) for integrated circuits (ICs) in high-volume FC-in-package (FCIP) production. FC technology is an advanced form of surface mount technology (SMT) in which bare semiconductor chips are turned upside down and hence called flip chips (i.e., active face down) and bonded directly to a PWB or chip carrier substrate. Development of solder-bump FC interconnections was initiated in an attempt to eliminate the expense, low reliability, and low productivity of manual wire bonding of the era. In contrast to wire bonding, which is a peripheral and time-consuming bonding technique in which bonds are formed sequentially, the FC allows all input-outputs (I/Os) to be connected simultaneously. Like its predecessors, FC technology was applied initially to peripheral contacts but quickly progressed to area arrays, which allow for high I/O counts at larger pitches and reduced die size because solder bumps can be put over active device areas on ICs, unlike wire bonds.

17.1 CONCEPT

FC interconnection is the connection of an IC chip to a carrier or substrate with the active face of the chip...

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