In low-frequency RF design, it is taken for granted that high-quality discrete components are available. Discrete lumped element components such as chip capacitors, inductors, and resistors can be manufactured to exhibit high Q values well into the gigahertz range. The CMOS RFIC designer, however, does not have this same luxury in assuming that high-Q components are available. In fact, without significant postprocessing or other fabrication techniques, inductor Q values of 10 are difficult to obtain. In addition, with the heavily doped silicon substrate (compared with semi-insulating substrates used in technologies such as GaAs), parasitic effects can be almost of the same order as the desired component value, and so careful consideration of the layout and design of RFIC passive elements is critical to circuit performance. This chapter takes a look at passive components, their nonidealities, as well as layout and simulation issues that provide details on their overall performance in CMOS RFIC designs. An introduction to transmission line and interconnect issues is covered since the equivalent circuit models for these components can be derived (at least to first order) from knowledge of the layout capacitance, inductance, and resistance. RF MEMS are finding increased use in CMOS RFIC designs, so an introduction to this technology is provided in this chapter. Finally, a primer on packaging, thermal, and grounding issues completes the chapter.