CMOS RFIC Design Principles

Chapter 8: CMOS PLLs and Frequency Synthesizers

CMOS RFICs are widely used in modern communications systems because of their seamless integration between RF and digital functionality. These communications systems often have significant requirements placed on the on-chip frequency generators: The frequency generators must be highly stable; in channelized systems, the channel frequency must be quickly and accurately set; and the generated noise introduced into the system must be minimized. In GSM systems, for example, the 25-MHz channel bandwidth is divided into 124 separate channels, with a channel spacing of 200 kHz. The GSM system specifications require that the system be frequency agile, with changes occurring on the order of a TDMA time frame of approximately 4.6 ms. All of this needs to be performed within a few parts per million accuracy. On-chip oscillators, both resonator and inverter based, such as those discussed in Chapter 6, do not provide the required stability needed for use in communication systems. The most stable of the oscillator types, those based on piezoelectric crystals, are not feasible for complete on-chip use and have upper frequency ranges of 100 MHz at best. However, by making these oscillators part of a controlled feedback structure with stable reference signals, the stringent communication system requirements can be readily achieved. These feedback control systems are the basis of modern frequency synthesizers.

This chapter covers the basics of frequency synthesis by beginning with a discussion of the basic feedback control structure based on phase lock loop (PLL) principles. The analysis focuses on those components that are most often...

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Category: IC Phase-locked Loops (PLL)
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