Overview

This chapter introduces the Intel IXA microarchitecture. It focuses on the critical functional units that are directly involved with touching packets in data plane processing, such as in the IPv6 packet flow described in Chapter 1. These units the microengines, chassis, and MSF are directly involved in the processing flow. While the Intel XScale core, PCI unit, SHaC, and DRAM unit are important functional units, their operation is either peripheral to the actual data plane processing or is already well understood and so is only briefly described here. The performance of the SRAM unit is very significant to maintaining high line rates and will be covered in more detail in Chapter 6. The goal of this chapter is not to explain all the details of the processor because you can find that information in the published documentation, such as the hardware reference manual for the respective processor (see References ). The IXP2400 and IXP2800 processors are functionally the same, so they are explained separately only when they differ. For an excellent article describing more of the details of the Intel IXA microarchitecture, see The Next Generation of Intel Network Processors (Adiletta et al. 2002).

The eight main functional units of the IXP2XXX processors, with the IXP2850 processor s crypto core being the ninth, are:

• Chassis The chassis is the internal highway of the IXP2XXX network processors. It is the set of internal data and command buses that connect the...