Overview

In Chapter 5, you learned the basics of multithreading and how a single microengine can perform multiple tasks to increase performance. However, one of the biggest questions software engineers have is how to map several tasks across several microengines. This task might seem challenging, given the eight and sixteen microengines of the IXP2400 or IXP28X0 processors, respectively. With process technology enabling even more transistors on a chip, more microengines could become available in the future. Therefore, it is critical to have a programming model that can be readily programmed and is optimized for the end application.

Because IXP2XXX network processors are fully software-based, the programming model can be chosen to suit the application at hand. In one approach, called Pool of Threads, the network processor is programmed much like a standard microprocessor in what is commonly called run-to- completion mode. Another approach is a pipelining architecture called Hyper Task Chaining. Regardless of the approach taken, two programming challenges inherent in parallel packet processing must be addressed: maintaining packet order and ensuring exclusive thread access to critical sections.

After reading this chapter, you may have questions about implementing your application using one of these programming models. For that information, refer to IXP2400/2800 Programming (Johnson 2003).