TABLE OF CONTENTS The external architecture defines how the IXP2XXX network processors interface to the outside world, which includes MACs, framers, switch fabrics, memory systems, and other IXP2XXX processors. The architecture implements industry standard interfaces to promote faster development time through a wide variety of standard, off-the-shelf components.
This chapter provides you with a general overview of the external hardware systems architecture of the network processor family. Several sample systems in this chapter show you different ways to configure these processors for specific applications. Because the Media and Switch Fabric (MSF) interface is the primary data path interface where packets are transferred through the network processor, we will look at this inter- face in greater detail. With the MSF description and the basic system configurations, you will better understand the internal architecture described in Chapter 4.
The Intel IXP2400 and IXP28X0 processors follow an ingress/egress processing model, in which a receive processor operates on the ingress traffic and a second transmit processor handles the egress traffic. The only difference between the ingress and egress processors is the software that runs them. Many other system implementations are possible, such as using single and multiple processors for ingress-egress operations. Figure 3.1 illustrates the external interfaces for the IXP28X0 network processor. For additional information about the IXP2XXX processors, see The Next Generation of Intel IXP Network Processors (Adiletta et al. 2002).
Figure 3.2...
