3.1 Introduction

Cost of test is of paramount importance to semiconductor manufacturers, and ATE vendors play a vital role in combating the increasing cost-of-test pressures of the market place. Sometimes the term cost of ownership (COO) is used instead of cost of test (COT), but they are synonymous and both refer to the overall cost of test. This chapter will discuss the many aspects associated with cost of test with particular emphasis on system-on-a-chip (SOC) COT. We will briefly discuss the evolution of wafer processing as it relates to cost of test and demonstrate the orders of magnitude savings that have been realized by increasing the dimensions of the wafer. Next, we will discuss how testing strategies have evolved from the initial days of using bench equipment setups (rack-and-stack solutions; see Chapter 1) for production solutions to the highly complex ATEs that are used to test today's SOC devices. We will then discuss how the SOC has created a paradigm shift, which in many cases has invalidated the old COT models that have been in use for many years. Next, the differences between an IC device manufacturer (IDM) and a subcontract manufacturer (SCM) will be highlighted, and we will show some of the effects this has on cost-of-test modeling. We will then shift our focus into the details of cost-of-test modeling and discuss the key parameters and provide some rules of thumb that can help in determining a COT. Certain parameters are more heavily influenced by ATE than...