Using IXP2400/2800 Development Tools: A Hands-on Approach to Network Processor Software Design
By Donald F. Hooper

List of Figures

Chapter 1: What's In It for Me?

Figure 1.1: Your Team
Figure 1.2: Internal Architecture of the Intel IXP2800 Network Processor
Figure 1.3: Intel IXP2400 Network Processor Microengine Detail
Figure 1.4: IXP2XXX Product Line Architecture Tool
Figure 1.5: Workbench Build
Figure 1.6: Developer Workbench Simulation
Figure 1.7: Packet List and Event List Views
Figure 1.8: Packet Dataflow View

Chapter 2: Why You Need New Tools

Figure 2.1: Partitioning of Packet Receive and Packet Processing
Figure 2.2: Hardware-Supported Multithreading
Figure 2.3: Packet Dataflow View

Chapter 3: Project Development Strategies

Figure 3.1: The Order in Which to Use the Tools in the Intel Internet Exchange Architecture (Intel IXA) SDK

Chapter 4: The Architecture Tool The Basics

Figure 4.1: You, the Architect
Figure 4.2: The IPV4/IPV6 Router Project
Figure 4.3: Processing Stages, Tasks, and Analysis
Figure 4.4: New Project
Figure 4.5: New Project Chip Configuration
Figure 4.6: Media Switch Fabric Settings
Figure 4.7: Initial-Stage Drawing
Figure 4.8: Defining the Data Stream
Figure 4.9: Inserting a Pipe Stage Task in the rx Pipeline Partition
Figure 4.10: Naming the New Task
Figure 4.11: Pipe Stage Task in the Pipeline Partition
Figure 4.12: Check the Data Structures
Figure 4.13: Data Structures for IPV4 Imported
Figure 4.14: The IPV4 Task Imported
Figure 4.15: Tasks Added
Figure 4.16: Adding an I/O Reference
Figure 4.17: Grouping the Tasks
Figure 4.18: Arranging the Parallel I/O References
Figure 4.19: Identifying the Scratch Ring
Figure 4.20: Rx to PPS Scratch Ring Connected
Figure 4.21: The...
Copyright Intel Corporation 2004 under license agreement with Books24x7
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