VLSI ReferencePoint Suite

List of Figures

Getting Started with VLSI

Point 1: Introducing VLSI Design Techniques

Figure 1-1-1: Design Hierarchy
Figure 1-1-2: Division of Components in the System Unit
Figure 1-1-3: Schematic Diagram of a Circuit Layout
Figure 1-1-4: Logic Gates Connectivity
Figure 1-1-5: Hierarchical Structure of a Design
Figure 1-1-6: Schematic Diagram of a Simple Design Module
Figure 1-1-7: A p-n Junction Diode
Figure 1-1-8: Forward Biasing
Figure 1-1-9: Reverse Biasing
Figure 1-1-10: A p-n-p and an n-p-n Transistor
Figure 1-1-11: Hierarchy of VLSI Design
Figure 1-1-12: The FET Control Gate
Figure 1-1-13: The FET Structure
Figure 1-1-14: BJT Technology
Figure 1-1-15: BJT Gates Architecture
Figure 1-1-16: Common-Emitter Current Gain
Figure 1-1-17: The MIS Capacitor
Figure 1-1-18: Capacitance of MIS
Figure 1-1-19: Equivalent Capacity of Semiconductor
Figure 1-1-20: Capacity of Semiconductor
Figure 1-1-21: Gradual Channel Approximation
Figure 1-1-22: n-channel MOSFET
Figure 1-1-23: The Drain Side Current
Figure 1-1-24: Absolute Value of Drain Current
Figure 1-1-25: Saturation Region
Figure 1-1-26: MOSFET in Saturation
Figure 1-1-27: Velocity-Field Relationship
Figure 1-1-28: Velocity-Field Relationship Graph
Figure 1-1-29: The p-well CMOS Technology
Figure 1-1-30: The n-well CMOS Technology
Figure 1-1-31: The twin-well Technology

Verilog Hardware Description Language

Point 1: Introducing Verilog HDL

Figure 2-1-1: Representation of the Behavioral Model of Hardware Design
Figure 2-1-2: The SR Flip Flop
Figure 2-1-3: Hardware Synthesis
Figure 2-1-4: A Net
Figure 2-1-5: The wire Net
Figure 2-1-6: The wor Net
Figure 2-1-7: The wand Net
Figure 2-1-8: The supply0 Net
Figure 2-1-9: The supply1 Net
Figure 2-1-10: The 3X8 Decoder
Figure 2-1-11: Equivalent Representation...

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Category: Metal-Oxide Semiconductor FET (MOSFET)
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