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  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    of International Business Strategies, at the Fabless Semiconductor Association Expo Thursday. Mentor adds concurrent HDL checking to tool suite Mentor Graphics Corp. said the latest version of the HDL Designer Series tool suite includes a concurrent design checking and creation environment. Marconi Society dubs
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    Semi heavyweights accused of patent infringement A Japanese inventor filed a patent infringement suit against four major semiconductor companies in U.S. District Court this summer. Micronic claims big productivity boost from next-generation Sigma Micronic Laser Systems AB has introduced the latest
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    Freescale exec says central design pays dividends Changes in Freescale Semiconductor's approach to chip design, including centralization of methodologies and tools and the appointment of a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    Freescale exec says central design pays dividends Changes in Freescale Semiconductor's approach to chip design, including centralization of methodologies and tools and the appointment of a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    controller business from Potentia Semiconductor Corp. for C$1.4 million ($1.2 million) in cash. Vistec debuts e-beams, inspection tool Seeking to make a big splash in the market, Vistec Semiconductor Systems GmbH has rolled out four new products, including a trio of electron-beam machines. French company
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    Freescale exec says central design pays dividends Changes in Freescale Semiconductor's approach to chip design, including centralization of methodologies and tools and the appointment of a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    offer opportunities, says panel World Semiconductor Council takes aim at IP protection ARM updates 'vision', aims to be in all digital chips ADI's sales jump 12% in Q2, sees 7-10% growth in Q3 ARM shows 'Optimode' strategy to analysts, investors Inspection startup nLine re-emerges with funding
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    and IC-equipment hopefuls in Europe, Japan and the U.S. have tried but failed to develop a viable photomask defect inspection tool to break KLA-Tencor Corp.'s stranglehold in the marketplace. Intel plans 64-bit Celeron push Intel Corp. this month is expected to formally detail its plans to bring 64-bit

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