TABLE OF CONTENTS This section introduces the first of the 13 diagrams that realise a behavioural aspect of the model: the state machine diagram. State machine diagrams are discussed in some detail in Chapter 4 and thus some of this section will serve as a recap. The focus here, however, is on the actual state machine diagram, whereas the emphasis previously has been on general behavioural modelling.
State machine diagrams realise a behavioural aspect of the model and are sometimes referred to as 'timing models', which may, depending on your background, be a misnomer. In UML 1.x, the term 'timing' referred purely to logical time, rather than real time. 'Logical time' here means the order in which things occur and the logical conditions under which they occur. There was no inherent mechanism for representing real time in state machine diagrams in UML 1.x.
This lack of real-time capability is often heralded as one of the shortfalls of the UML but, technically speaking, this was not actually true. The UML has never claimed to be a real-time modelling technique and thus these criticisms fall outside the scope of the UML. Up until now, that is! UML version 2.0 has been expanded to include mechanisms for representing timing information on certain diagrams - one of which is the state machine diagram, where timing attributes may be added to states. There are several extension mechanisms for the UML that claim full real-time capabilities, such as determinism and full temporal...
