TABLE OF CONTENTS This chapter explains the advantages of using an FGMOS device over a standard MOS transistor in circuits which require low power and low voltage operation. The first section introduces three circuit equivalents for the FGMOS device which are then used in subsequent chapters to design more complex circuits with a higher functionality. Several simple circuits are then presented in order to give the reader a flavour of various new design paths that the FGMOS transistor opens, in addition to illustrating the device functionality. The design trade offs are also explained together with examples. Novel, state-of-the-art building blocks and architectures can then be developed from the presented structures. They are left to the reader to optimise and refine. More advanced circuits are introduced and analysed in subsequent chapters.
This section introduces three circuit equivalents for the FGMOS transistor: an adder; a variable V T FET and a current multiplier, which present the device as a tunable, controllable and flexible element. Seeing the FGMOS as one of these equivalent blocks can help the designer to anticipate when the transistor might be useful in a specific design.
As eq. (2.2) shows, the FGMOS could be seen as a normal MOS transistor with a weighted sum of voltages applied to its gate (Fig. 3.1). The weights are given by the ratios between each input capacitance and the total capacitance seen by the FG.
