TABLE OF CONTENTS Until now, the only technological requirement for the design of circuits based on FGMOS transistors has been to have a double poly technology. This is because these circuits' functionality is based on capacitive couplings and using double poly is the easiest and more accurate form of realising capacitors. However, theoretically speaking it could also be possible to implement capacitors using metal on top of polysilicon (poly). The aim of this section is to analyse some of the consequences and somehow the feasibility of using a purely digital technology, without a second layer of poly and low quality metal/poly capacitors. The analysis uses as example the transconductor block and filter described in the previous section.
The main drawback of having low quality metal/poly capacitors in FGMOS devices is the fact that a much larger area is required to implement a certain capacitance value. An alternative to this is to scale the capacitance values down while still keeping the effective inputs capacitive weights. However, both cases suffer from the same problem: the parasitic capacitance to the well beneath the capacitor might be of the same order of magnitude as the nominal values, which causes a reduction of the transistor effective transconductance. Let us express the effective input weight as
where C pma is the poly1 to metal capacitance per unit of area, C pmp per unit of perimeter, and C pwa and C
