Low Power and Low Voltage Circuit Design with the FGMOS Transistor

This chapter presents filter designs that use the characteristic features of the FGMOS transistor operating in the strong inversion saturation region to be able to operate at a very low power supply voltage with also a very low power consumption. Again, the implementation of the mathematical functions is greatly improved thanks to the extra degrees of freedom that the device provides, which results in a fewer number of power consuming elements. Besides, the new effective threshold voltages make possible to operate with signal levels that would have switched normal MOS transistors off, hence enabling the reduction of the power supply voltage, while still keeping the signal ranges.
The chapter also analyses the drawbacks of using FGMOS transistors and based on this analysis advises the reader on when not to use them. Thus, for example it shows how in certain cases, the PSRR can be seriously degraded, and if it is a design constraint the transistor should be used in a different way, or even avoided.
Two different integrator designs illustrate the transistor performance. The first one is an audio range linearised G m-C block in which the linearisation is obtained by combining the quadratic law in different FGMOS devices working in the strong inversion saturation region. The second integrator is again a G m-C structure but operating in an intermediate frequency (IF) range under a very restrictive power supply voltage constraint.
Finally, the chapter also describes what happens when the input capacitances in the FGMOS transistors...