Low Power and Low Voltage Circuit Design with the FGMOS Transistor

The last two chapters have presented the design of three different OTA-C integrator/ filter topologies, based on the FGMOS transistor operating in the strong inversion region. All the topologies have as common aims the reduction of the power consumption and power supply voltage while keeping a good circuit performance. The first one employs the features of the transistor in the strong inversion ohmic region to linearise the voltage to current conversion; the second one does the same but taking advantage of the strong inversion saturation operation instead; the last one is not a linearised structure but still achieves a large linear input range thanks to the signal compression at the transistor FG. This topology also proves the feasibility of the device to operate at intermediate frequencies consuming very little power even with a low power supply voltage.
Table 5.8 compares the performance of the three main transconductor blocks in terms of the main design target parameters.
As the table shows the first two transconductors are suitable for low frequency applications. The second transconductor (transconductor based on FGMOS transistor sbiased in the strong in versions at uration region) requires a high ervoltage supply to operate, offering however a larger programmability range than the first one (transconductor based on FGMOS transistors biased in the strong inversion ohmic region). The third transconductor is more suitable for intermediate frequencies applications. Nevertheless, as it is the only non-linearised topology, the input range is smaller.