Overview

This paper describes our InP-based heterojunction bipolar transistor (HBT) technologies and circuit design techniques for small-scale-integration (SSI) and medium-scale-integration (MSI) circuits for 40- to 100-Gbit/s-class optical communications systems. The circuits include a sub-4-ps emitter-coupled logic (ECL) gate, 100-Gbit/s selector circuit, 90-Gbit/s decision circuit, 50-Gbit/s 4:1 multiplexer (MUX) and 1:4 demultiplexer (DEMUX) ICs, over-40-Gbit/s 16:1 MUX IC, and 40-Gbit/s full-clock-rate DEMUX with a clock and data recovery (CDR) circuit. This paper demonstrates that InP-based HBT technologies and our circuit design techniques are attractive for fabricating ultrahigh-speed SSI circuits with data rates approaching 100 Gbit/s and low-power MSI circuits with data rates of over 40 Gbit/s.

Keywords: InP-based HBT; ECL gate; MUX; DEMUX; Decision circuit; Selector circuit; CDR; Optical communications.

1. Introduction

InP-based heterojunction bipolar transistors (HBTs) are particularly attractive for fabricating high-performance integrated circuits (ICs) because they offer high internal gain, high driving capability, high cutoff frequency fT, and high maximum oscillation frequency fmax. On the other hand, there are strong demands for more transmission capacity in optical communications systems to support various communication services. High-speed low-power ICs are necessary for broadband optical communications systems to integrate complex functions in the system, compactly and cost effectively. Recently, we have developed InP-based HBT technologies for achieving high-performance small-scale-integration (SSI) and medium-scale-integration (MSI) circuits. One device is an InP/InGaAs HBT with an undoped...