IXP1200 Programming: The Microengine Coding Guide for the Intel IXP1200 Network Processor Family

While SRAM CAM locks alleviate our abuse of the SRAM unit in the bittestand-clear example code, they are limited to providing only short-term locks, and they do not apply to scratchpad memory. Furthermore, neither of our approaches to inter-microengine synchronization so far allows direct synchronization of SDRAM memory. To solve these limitations, let s explore a final inter-microengine programming concept: inter-thread signals.
Inter-threads signals avoid the abusive behavior of spin-loops, have long-term blocking of threads, and are memory-agnostic. Inter-thread signals make it possible for any thread to send a signal to any other thread. Any thread can wait for an inter-thread signal. Inter-thread signals carry no information with them, not even an indication of which thread sent the signal. Only one inter-thread signal sent to a thread is queued; sending two inter-thread signals to the same thread before the thread consumes the first results in the loss of the second signal.
Let s start, as always, with the intrinsic signatures. Sending an interthread signal involves writing the inter_thd_sig CSR.
This can be accomplished with the following intrinsic:
void csr_fast_write( <a name="wbp09Chapter7P485"></a> csr_t csr, /* csr to write */ <a name="wbp09Chapter7P486"></a> unsigned int data /* data to write */ <a name="wbp09Chapter7P487"></a>);
The value of the first parameter would be inter_thd_sig, and the data field is the thread to signal. The data field must...