IXP1200 Programming: The Microengine Coding Guide for the Intel IXP1200 Network Processor Family
This guide shows software engineers how to program the microengines of Intel s IXP1200 family of network processors.
TABLE OF CONTENTS IXP1200 Programming: The Microengine Coding Guide for the Intel IXP1200 Network Processor Family
Chapter 9: Transmitting Data
The goal of this chapter is to build on the concepts and the microblocks from Chapter 8 that receive, bridge, and enqueue packets, to produce a microblock that can also transmit packets out of the IXP12xx. By the end of this chapter, we will have built a microblock to transmit these packets through a port on the IXF440 Octal MAC. Since the process of dequeuing packets is just the dual of enqueing packets, we won t describe it in detail here. The Chapter 9 sample code has an implementation that you can look at if you are interested.
Transmit State Machine
Chapter 2 presented a basic description of the transmit state machine (TSM), but there is a lot more to it. Figure 9.1 shows the major components of the TSM.
Figure 9.1: The Components of the Transmit State Machine
The TSM maintains a pointer to a TFIFO element. The microengines can access this pointer via the xmit_ptr CSR. If the TFIFO element has not yet been marked valid by the microengines, the pointer does not move until the microengines mark it valid. When the TFIFO element has been marked valid, the TSM examines the TFIFO element s control word to determine the MAC device and port to which the data should be sent. The control word also tells the TSM whether the packet chunk contained in the TFIFO element is the start of a packet (SOP), the end of a packet (EOP), both, or neither. It then sends the data to...
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