Low-Voltage CMOS RF Frequency Synthesizers

A loop filter is often used in PLLs and synthesizers, not only for converting the current from the charge pump to the control voltage for the VCO, but also for filtering out noise coming from the input clock to the control voltage. Otherwise, unacceptably high spurious tones are present in the PLL output spectrum. This section presents different types of loop-filter implementation, including passive filters and active filters.
Instead of a second-order loop filter, as shown in Chapter 2, a third-order loop filter (Fig. 3.45) can be used to further suppress ripples at its output, which is also the control voltage of the VCO. With one more pole being added, the transfer function of the loop filter becomes:
where:
k ? is the time constant of integration equal to 1/( C 1 + C 2);
? z is the time constant that provides a stabilizing zero to the loop which is equal to R 1 C 1;
? p 1 and ? p 2 are the time constants of the poles that suppress the tones of the reference clock and its higher harmonics. The time constant of ? p 1 equals R 1 C 1 C 2/( C 1 + C 2), while ? p 2 equals R 3 C 3.
Although it is simple to design and implement passive loop filters, they...