Ultra Low-Power Electronics and Design

Chapter 4: Static Leakage Reduction Through Simulteneous VT/TOX and State Assignment

Dongwoo Lee Bo Zhai David Blaauw Dennis Sylvester,
University of Michigan
Ann Arbor

OVERVIEW

Standby leakage current minimization is a pressing concern for mobile applications that rely on standby modes to extend battery life. In this paper, we propose new leakage current reduction methods in standby mode. First, we propose a combined approach of sleep-state assignment and threshold voltage ( V t) assignment in a dual- V t process for subthreshold leakage ( I sub) reduction. Second, for the minimization of gate oxide leakage current ( I gate) which has become comparable to I sub in 90nm technologies, we extend the above method to a combined sleep-state, V t and gate oxide thickness ( T ox) assignments approach in a dual- V t and dual- T ox process to minimize both I sub and I gate. By combining V t or V t/T ox assignment with sleep-state assignment, leakage current can be dramatically reduced since the circuit is in a known state in standby mode and only certain transistors are responsible for leakage current and need to be considered for high- V t or thick- T ox assignment. A significant improvement in the leakage/performance trade-off is therefore achievable using such combined methods. We formulate the optimization problem for simultaneous state/ V t and state/ V t/T ox assignments under delay constraints and propose both an exact method for its optimal solution...

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