TABLE OF CONTENTS Consider the leakage and performance of the simple NAND2 circuit shown in Figure 4.2 under different input states and V t assignments. It is clear that given a particular input state, only those transistors that are OFF need to be considered for high- V t assignment as the ON-transistors are not leaking. For instance, in state AB = 01, only transistor t n1 needs to be considered for high- V t assignment. Assigning other transistors to high- V t will only decrease the performance of the gate with no reduction in leakage current. On the other hand, in state 11 both t p1 and t p2 must be assigned high- V t in order to reduce leakage, since they are parallel devices.
We can partition the transistors into so-called V t-groups, corresponding to the minimum sets of transistors that need to be set to high- V t to reduce leakage in a particular state assignment. For the 2-input NAND gate in Figure 4.2, three V t-groups exist as shown. The concept of V t-groups can be easily applied to more complex structures in which case it may be possible that a transistor belongs more than one V t-group. It is clear that we can restrict our-selves to setting only entire V t
