5.2.1 Basic fabrication steps and MOS transistor structures

Before discussing the basic fabrication steps of a simple CMOS process, we take a look at the final result of such steps. MOS transistors made with a CMOS process are shown in Fig. 5.1a and b. In Fig. 5.1a, a top view is shown. If one makes a cut along a horizontal line passing through the middle, one obtains the vertical cross section shown in Fig. 5.1b. In this figure and in other related figures in this chapter, the approximate boundary between silicon regions of high and low doping of the same conductivity type (i.e., both p or both n), is indicated by broken lines. Boundaries between regions of the opposite type (which thus form a pn junction) and boundaries between different materials are indicated by solid lines. The substrate is p type (usually with a doping concentration between 10 ¹⁴ and 10 ¹⁶ cm ^?3), and the nMOS devices can be formed directly on it. However, pMOS devices must have an n-type body and thus cannot be formed directly on the substrate. Thus, separate n-type regions called wells or tubs are used to host such devices as shown. For this reason, this particular process is referred to as an n-well process. The body of the pMOS transistors is contacted through an n ⁺ region in the n