3.3 Specifying the VeSPA ISA

In the previous section, we determined the set of instructions we want to include in our processor. Before we can begin to build simulation models for this processor, however, we need to very carefully specify exactly what each instruction does and the ways in which they affect the storage elements that comprise the processor s state. This instruction set architecture (ISA) specification precisely defines for the assembly language programmer and the compiler writer what each instruction does, what registers it changes, what inputs it expects, and so forth.

You can think of this ISA specification as a detailed contract between the processor architect and the programmers. It also provides a contract between the architect and the logic designers who ultimately will implement this ISA in actual hardware. As long as both the programmers and the logic designers satisfy the conditions specified in this ISA contract , the architect is guaranteeing that their programs will run as expected on any processor that is designed to this ISA specification.

At this stage we do not want to specify how each instruction accomplishes its operations, though. We want to leave the details of the implementation to lower levels of the design hierarchy. This approach allows us to define a single ISA that can have many different underlying implementations. These different implementations may be designed to satisfy different cost and performance constraints, for instance. However, by maintaining the same ISA across several different implementations, we maintain the ability to run...