Overview

A processor design cannot be considered complete until it has undergone a rigorous verification process. The goal of this verification process is to ensure that the processor behaves as specified in the ISA under all possible conditions and all possible input combinations. Of course, due to the number of potential inputs and states, this is an impossible goal. Instead, we try to verify each component of the processor as rigorously as possible within the given time and resource constraints. We also try to verify the operation of the entire processor after all of the components have been assembled into a complete system.

In this chapter, we first look at using Verilog test benches to verify the operation of individual processor modules. We examine two types of test bench. The first, which we call directed testing, uses inputs that are carefully chosen to exercise specific aspects of the module being tested. The second type of testing uses pseudorandom inputs to automatically exercise a very large number of input combinations.

After learning about these module-level testing techniques, we introduce the idea of self-test programs. These tests are written in the processor s assembly language, or in a high-level programming language that is compiled into the processor s assembly language. When the self-test program is executed, it verifies that the...