Designing Digital Computer Systems with Verilog
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system.
TABLE OF CONTENTS Designing Digital Computer Systems with Verilog
Appendix B: The VASM Assembler
The assembler developed for the VeSPA processor is called VASM, for VeSPA ASeMbler. This assembler takes a text file as input and produces as output an object file consisting of a sequence of hexadecimal values. The contents of this file can be read into the simulated VeSPA memory by the Verilog simulator using the readmemh() operation.
The error-checking in the VASM assembler is not very robust making it all too easy to confuse the assembler. Furthermore, the error messages it produces are very brief and can sometimes be misleading. Nevertheless, it is still easier to use this assembler to produce the object file rather than trying to assemble your programs by hand. This appendix provides a brief summary of the assembler notation. Additionally, Section B.4 shows how to modify the assembler with a detailed example of adding a new instruction.
B.1 Notational Conventions
The following notation is interpreted by the assembler to have special meaning.
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;, //. Both the semicolon (;) and two adjacent forward slash characters (//) indicate that the following text is a comment. Any characters on a line that follow either of these symbols are ignored by the assembler. These two types of comment characters have identical meanings and can be used interchangeably.
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#. The pound sign is used to denote an immediate operand. For example, #58 tells the assembler to use the value 58 as an immediate operand.
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0x. This character sequence indicates that the following...
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