3.4 Summary

The instruction set architecture (ISA) of a processor precisely defines the interface between the hardware designers and the software developers. In this chapter, we demonstrated with the example VeSPA processor the steps a computer architect would use to develop the ISA for a new processor. We discussed several of the important design trade-offs that face the architect, such as the various approaches to specifying an instruction s operands and how to go about choosing specific instructions to include in the ISA. We also showed how condition codes can be calculated and used to create a rich variety of conditional branch instructions. Finally, we defined the instruction format for each instruction in VeSPA and precisely specified how each instruction operates.

The next step is to build a behavioral simulation model to experiment with this new processor specification. This model will allow us to validate that our specification is complete and that our trade-offs were appropriate. If it turns out we made some poor trade-offs, or we need to more precisely specify certain operations, we can always return and change the ISA specification, at least until we release the specification to the programmers.