TABLE OF CONTENTS Never assume anything works right the first time. If you can't validate it, assume it's broken.
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Just as successful PCI Express interconnect design requires careful attention to detail, so too does validating the design. For example, consider the act of measuring the vertical opening of an eye diagram using an oscilloscope. This measurement may seem relatively straightforward, but consider the following:
Because the voltage swings in PCI Express technology are less than half those of conventional low-voltage CMOS technology used in DDR memory systems, for example, measurement errors introduced by the oscilloscope's noise floor and vertical system can become a significant percentage of the total measurement.
Using two single-ended probes to make differential measurements adds further error.
Likewise, the finite bandwidth of the measurement equipment itself distorts an eye diagram, and in extreme cases, renders a measurement result worthless.
If that is not enough, at gigahertz speeds even the best low capacitance probes load the link and distort the measurement.
Finally, you must also be aware of how measurements taken in system relate to measurements taken into a compliance test load, and how to prove specification compliance.
Fortunately, with a basic understanding of measurement methodology, you can minimize these errors and account for those that do occur. This chapter focuses on the limitations of the test equipment and the related measurement methodologies, and discusses how to account for these limitations as well as the measurements needed to prove specification compliance.
