2.4 FREQUENCY SYNTHESIZERS

A frequency synthesizer is essentially a frequency source whose output is an integer multiple of a very stable input reference frequency. A very basic frequency synthesizer, shown in Fig. 2-15, consists of a PLL with a divide-by- N counter inserted between the VCO output and phase detector input. The divide-by- N counter is a digital device that can be programmed with the desired binary number using thumbwheel switches. To make the PLL work correctly, f _i must equal f _o/N. This can be expressed as:

(2.25)

Therefore:

(2.26)

By varying N, the output frequency f _o can be changed in increments of f _i. Therefore, if it is necessary to change f _o by increments of 10 kHz, the input reference frequency must equal 10 kHz. This frequency is usually generated by a highly stable crystal-controlled oscillator. In Fig 2-15, the phase detector, low-pass filter, and VCO make up the forward path of the loop while the " N" counter constitutes the feedback path.

Figure 2-15

In modern electronic communication systems, it is not uncommon for frequency synthesizers to produce frequencies in the 30 to 300 MHz range. Since the maximum operating frequency of most TTL and CMOS divide-by- N counters is about 50 MHz, the basic frequency synthesizer of Fig. 2-15 is not well suited for use at these very high frequencies. A technique often used to reduce the frequencies generated within the loop is...