TABLE OF CONTENTS Die stacking is highly prevalent in memory packages and has been extended to logic and analog integrated circuits [35]. Some of the same advantages for SiP versus SoC are applicable for die stacking. Reduced system-level cost and size result from a single-module package containing two or more stacked die. Dissimilar technologies can be used in the same module, Flash/SRAM/DRAM/ logic, with low- and high-density die and low- and high-voltage die combinations. The same storage density can be achieved at a lower cost with stacked, less expensive low-density silicon SRAM architectures than with one die with a finer-geometry design. Stacked die also offer a reduced design cycle time for quicker market penetration and more design flexibility to combine off-the-shelf devices with specialized devices that can achieve quicker reaction to changing market demands. These results are achieved through wafer thinning and handling down to 75 mm, low loop wire bonding, die overhang wire bonding, and thin spacer technologies.
RF die stacking has not been accomplished in a production module to date. Die stacking allows for more functionality within the same module footprint, but this is not as easy as it sounds and is especially complicated with RF die thrown into the mix. RF die requires good grounding and shielding, which in most module designs means separating RF and digital functions [36]. Noise on a voltage controlled oscillator can cause large frequency shifts, FM modulation, in the RF transmit and receive signals. Differential circuitry can reduce...
