TABLE OF CONTENTS This chapter shows how layout is used to create integrated circuits. The chapter describes the manufacture of wafers and the processing steps of depositing, patterning, and etching different layers of material to create an integrated circuit. An example CMOS process flow is described showing chip cross sections and equivalent layout at each step.
Upon completion of this chapter the reader will be able to:
Describe the different types of silicon wafers in common use.
Understand the advantages and disadvantages of different types of deposition.
Compare and contrast different types of etching.
Understand the creation of masks from layout and their use in photolithography.
Visualize the interaction of exposure wavelength, feature size, and masks.
Describe the use of ion implantation in integrated circuit fabrication.
Explain the steps of a generic CMOS manufacturing flow.
Understand how sidewalls and silicide are used in MOSFET formation.
All the semiconductor design steps discussed in previous chapters are based upon simulations. This chapter shows how after all these steps are completed, actual integrated circuits are manufactured. To make a chip with millions of transistors and interconnections would not be practical if the devices had to be created in a serial fashion. The features to be produced are also far too small to be individually placed even by the most precise equipment. Semiconductor manufacturing achieves rapid creation of millions of microscopic features in parallel through the use of light sensitive chemicals called photoresist. The desired layout is used to create a mask through...
